EEL5717 Fund. of Computer Hardware (Computer
Architecture)
Fall Semester, 1997
Capstone Class Research Project
Project Assigned: September 15,
1997
Final Report Due: December 15, 1997
Weight: 10
The following is a description of the capstone research
project for our course this semester. This capstone project in
intended to run the course of the remainder of the semester, and
its purpose is to provide the opportunity to explore fundamental
issues in computer architecture in terms of a particular target
issue, problem or application. There will also be one or several
small mini-projects (a.k.a. single-problem homework assignments)
of significantly smaller weight assigned in the future, but these
will be targeted at specific issues uncovered in a particular
chapter under study at the time.
You are to form a team of one, two or at most three
persons (two is the preferred size) and conduct a modeling, simulation,
and analysis research project in an area of computer architecture
of your choosing (subject to approval by the instructor). You
may explore issues in computer design fundamentals (e.g. benchmarking
and performance measurements), instruction set architectures (e.g.
ISA design strategies), pipelining (e.g. impact and reduction
of hazards), advanced pipelining (e.g. superscalar or VLIW tradeoffs,
vector processing), memory-hierarchy design (e.g. caching or virtual
memory strategies), storage systems (e.g. high-performance I/O
mechanisms), interconnection networks (high-performance communication
mechanisms), or multiprocessing (e.g. synchronization, multithreading,
distributed caches, etc.). Furthermore, much as our book does,
this project may emphasize issues in architecture design for general-purpose
processors and systems (e.g. branch prediction, cache design,
high-performance I/O or communication, etc.). However, an equally
acceptable approach would be to instead pursue issues related
to special-purpose architectures and applications (e.g. processor
architectures for avionics systems, node architectures for passive
signal processing, DSP microprocessor architecture, microcontroller
architecture, application-specific issues in graphics, multimedia
or databases, low-power architectures, etc.).
You may choose the modeling and simulation platform
employed from those available. Some of these platforms include
VHDL, BONeS, Foresight, or your own C/C++ code. Your models should
be developed in a modular fashion and be tested, verified and
validated analytically and via testbed experimentation (if available).
The culmination of your project will consist of a
clear and concise technical report suitable for publication discussing
your project, experiments, results, and analysis as well as an
appendix (either paper or electronic) with a clear representation
of all your models or programs. Your documentation should be
prepared and presented in a structured, polished, and professional
manner. The project grade will be determined based on the ratio
of the challenge and the quality of the work versus the size of
the team.
Deliverables:
NOTE: It is understood that the topic of your project may support your personal research interests and/or future thesis focus. While such an overlap is acceptable, any previous or current work used in partial fulfillment of the requirements of any other course (e.g. project from a previous course or proposed in another current course) must be clearly noted in the proposal and those portions may not be counted for credit toward the requirements of this project.