Adam Flynn
Research Assistant, MS Student
NSF Center for High-Performance Reconfigurable Computing
Former member, F4 (Partial Reconfiguration)
Current member, F6 (Reconfigurable and Hybrid Fault Tolerance)
Contact Info
Email: flynn@hcs.ufl.edu
Office: Benton 330
Research Interests
Current Research Activities
- Fault Tolerance for Reconfigurable Multicore devices
- Development of partial bitstream relocation capabilities for Xilinx FPGAs
- Virtual Architectures for FPGAs
- Partial Reconfiguration of Reconfigurable Computing (RC) devices
Other Interests
- Embedded Systems Design and Development
- Computer Architecture
- Reconfigurable Computing
- Systems Engineering
Spring 2009 Schedule
Monday Tuesday Wednesday Thursday Friday 07:25 - 08:15 (Per 1) 08:30 - 09:20 (Per 2) 09:35 - 10:25 (Per 3) F4/F6 F4/F6 10:40 - 11:30 (Per 4) EEL 6825 EEL 6825 11:45 - 12:35 (Per 5) EEL 6825 12:50 - 1:40 (Per 6) All-Hands 1:55 - 2:45 (Per 7) 3:00 - 3:50 (Per 8) EEL 6507 EEL 6507 EEL 6507 4:05 - 4:55 (Per 9) 5:10 - 6:00 (Per 10)
Publications
A. Flynn, A. Gordon-Ross, and A. George, "Bitstream Relocation with Local Clock Domains for Partially Reconfigurable FPGAs," Design, Automation & Test in Europe (DATE) Conference, Nice, France, April 20-24, 2009
Education
M.S. Electrical and Computer Engineering
University of Florida
January 2008 to present
[Resume]B.S. Computer Engineering, B.S. Electrical Engineering, Mathematics Minor
University of Missouri-Rolla
August 2003 to December 2007
